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vishay siliconix dg2041, dg2042, dg2043 document number: 72091 s11-1185-rev. b, 13-jun-11 www.vishay.com 1 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 low-voltage, low r on quad spst analog switch description the dg2041/2042/2043 are quad single-pole/single-throw monolithic cmos analog switch designed for high performance switching of analog signals. combining low power, fast switching, low on-resistance (r ds(on) : 1 ? at 2.7 v) and small physical size, the dg2041/2042/2043 are ideal for portable and battery powered applications requiring high performance and efficient use of board space. the dg2041/2042/2043 are built on vishay siliconix?s new high density low voltage process. an epitaxial layer prevents latchup. each switch conducts equally we ll in both directions when on, and blocks up to the power supply level when off. features ? halogen-free according to iec 61249-2-21 definition ? low voltage operation (1.8 v to 5.5 v) ? low on-resistance - r ds(on) : 1 ? ? fast switching - 14 ns t on ? low charge injection - q inj : 1 pc ? low power consumption ? ttl/cmos compatible ? tssop-16 and qfn-16 packages ? compliant to rohs directive 2002/95/ec benefits ? reduced power consumption ? simple logic interface ? high accuracy ? reduce board space applications ? cellular phones ? communication systems ? portable test equipment ? battery operated systems ? sample and hold circuits functional block diagram and pin configuration - dg2041 switches shown for logic ?0? input dg2041dn n.c. v+ nc4 gnd nc3 n.c. nc1 nc2 1 2 3 12 11 10 4 9 56 7 8 16 15 14 13 t o p v iew qfn-16 (4 x 4) com1 in1 in2 com2 com4 in4 in3 com3 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 top view in1 in2 com1 com2 nc1 nc2 n.c. v+ gnd n.c. nc4 nc3 com4 com3 in4 in3 tssop dg2041dq truth table - dg2041 logic switch 0on 1off
www.vishay.com 2 document number: 72091 s11-1185-rev. b, 13-jun-11 vishay siliconix dg2041, dg2042, dg2043 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 functional block diagram and pi n configuration - dg2042, dg2043 switches shown for logic ?0? input switches shown for logic?0? input dg2042dn n.c. v+ no4 gnd no3 n.c. no1 no2 1 2 3 12 11 10 4 9 56 7 8 16 15 14 13 t o p v iew qfn-16 (4 x 4) com1 in1 in2 com2 com4 in4 in3 com3 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 top view in1 in2 com1 com2 no1 no2 n.c. v+ gnd n.c. no4 no3 com4 com3 in4 in3 tssop dg2042dq truth table - dg2042 logic switch 0off 1on dg2043dn n.c. v+ no4 gnd nc3 n.c. no1 nc2 1 2 3 12 11 10 4 9 5678 16 15 14 13 top view qfn-16 (4 x 4) com1 in1 in2 com2 com4 in4 in3 com3 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 top view in1 in2 com1 com2 no1 nc2 n.c. v+ gnd n.c. no4 nc3 com4 com3 in4 in3 tssop dg2043dq truth table - dg2043 logic switches 1, 4 switches 2, 3 0offon 1onoff
document number: 72091 s11-1185-rev. b, 13-jun-11 www.vishay.com 3 vishay siliconix dg2041, dg2042, dg2043 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes: a. signals on nc, no, or com or in exceeding v+ will be clamped by internal diodes. limit forward diode current to maximum curr ent ratings. b. all leads welded or soldered to pc board. c. derate 5.6 mw/c above 70 c d. derate 23.5 mw/c above 70 c e. manual soldering with soldering iron is not recommended for leadless components. the qfn is a leadless package. the end of t he lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. a solder fillet at the exposed copper lip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. ordering information temp range package part number - 40 c to 85 c tssop-16 dg2041dq-t1 dg2041dq-t1-e3 dg2042dq-t1 dg2042dq-t1-e3 dg2043dq-t1 dg2043dq-t1-e3 qfn-16 (4 mm x 4 mm) dg2041dn-t1-e4 dg2042dn-t1-e4 DG2043DN-T1-E4 absolute maximum ratings parameter symbol limit unit reference v+ to gnd - 0.3 to + 6 v in, com, nc, no a - 0.3 to (v+ + 0.3) continuous current (any terminal) 50 ma peak current (pulsed at 1 ms, 10 % duty cycle) 200 storage temperature (d suffix) - 65 to 150 c power dissipation (packages) b tssop-16 c 450 mw qfn-16 (4 mm x 4 mm) d 1880 specifications (v+ = 2 v) parameter symbol test conditions otherwise unless specified v+ = 2 v, v in = 0.4 v or 1.6 v e temp. a limits - 40 c to 85 c unit min. b typ. c max. b analog switch analog signal range d v no , v nc v com full 0 v+ v on- resistance r on v+ = 2 v, v com = 0.2 v/1.2 v, i no , i nc = 10 ma room full 36.3 6.3 ? r on flatness d r on flatness v+ = 2 v, v com = 0 v to v+, i no , i nc = 10 ma room 4.2 r on match between channels ? r on room 0.4 switch off leakage current f i no(off) i nc(off) v+ = 2.2 v v no , v nc = 0.2 v/2 v, v com = 2 v/0.2 v room full d - 1 - 10 1 10 na i com(off) room full d - 1 - 10 1 10 channel-on leakage current f i com(on) v+ = 2.2 v, v no , v nc = v com = 0.2 v/2 v room full d - 1 - 10 1 10
www.vishay.com 4 document number: 72091 s11-1185-rev. b, 13-jun-11 vishay siliconix dg2041, dg2042, dg2043 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 parameter symbol test conditions otherwise unless specified v+ = 2 v, v in = 0.4 v or 1.6 v e temp. a limits - 40 c to 85 c unit min. b typ. c max. b digital control input high voltage v inh full 1.6 v input low voltage v inl full 0.4 input capacitance d c in full 4 pf input current i inl or i inh v in = 0 v or v+ full - 1 1 a dynamic characteristics tu r n - o n t i m e t on v no or v nc = 1.5 v, r l = 300 ? , c l = 35 pf fig. 1 and 2 room full d 30 81 82 ns turn-off time t off room full d 22 41 42 break-before-make time delay t d v no or v nc = 1.5 v, r l = 300 ? , c l = 35 pf (dg2043 only) room 5 charge injection d q inj c l = 1 nf, v gen = 0 v, r gen = 0 ? , fig. 2 room 1 pc off-isolation d oirr r l = 50 ? , c l = 5 pf, f = 1 mhz room - 63 db crosstalk d x ta l k room - 95 no, nc off capacitance d c no(off) c nc(off) v in = 0 v or v+, f = 1 mhz room 24 pf channel-on capacitance d c on room 48 power supply power supply current d i+ v in = 0 v or v+ 0.001 1 a specifications (v+ = 2 v) specifications (v+ = 3 v) parameter symbol test conditions otherwise unless specified v+ = 3 v, 10 % , v in = 0.4 v or 2 v e temp. a limits - 40 to 85 c unit min. b typ. c max. b analog switch analog signal range d v no , v nc v com full 0 v+ v on-resistance r on v+ = 2.7 v, v com = 0.7 v/1.5 v, i no , i nc = 10 ma room full 1.6 2.1 2.2 ? r on flatness d r on flatness v+ = 2.7 v, v com = 0 v to v+, i no , i nc = 10 ma room 0.7 r on match between channels ? r on room 0.3 switch off leakage current f i no(off) i nc(off) v+ = 3.3 v v no , v nc = 0.3 v/3 v, v com = 3 v/0.3 v room full - 1 - 10 1 10 na i com(off) room full - 1 - 10 1 10 channel-on leakage current f i com(on) v+ = 3.3 v, v no , v nc = v com = 0.3 v/3 v room full - 1 - 10 1 10 digital control input high voltage d v inh full 1.6 v input low voltage v inl full 0.4 input capacitance d c in full 4 pf input current i inl or i inh v in = 0 v or v+ full - 1 1 a
document number: 72091 s11-1185-rev. b, 13-jun-11 www.vishay.com 5 vishay siliconix dg2041, dg2042, dg2043 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 specifications (v+ = 3 v) parameter symbol test conditions otherwise unless specified v+ = 3 v, 10 % , v in = 0.4 v or 2 v e temp. a limits - 40 c to 85 c unit min. b typ. c max. b dynamic characteristics tu r n - o n t i m e d t on v no or v nc = 2 v, r l = 300 ? , c l = 35 pf fig. 1 and 2 room full 19 51 52 ns turn-off time d t off room full 17 36 37 break-before-make time delay t d v no or v nc = 2 v, r l = 300 ? , c l = 35 pf (dg2043 only) room 2 charge injection d q inj c l = 1 nf, v gen = 0 v, r gen = 0 ? , fig. 2 room 3 pc off-isolation d oirr r l = 50 ? , c l = 5 pf, f = 1 mhz room - 63 db crosstalk d x ta l k room - 94 no, nc off capacitance d c no(off) c nc(off) v in = 0 v or v+, f = 1 mhz room 25 pf channel-on capacitance d c on room 49 power supply power supply current i+ v in = 0 v or v+ 0.001 1 a specifications (v+ = 5 v) parameter symbol test conditions otherwise unless specified v+ = 5 v, 10 % , v in = 0.8 v or 2.4 v e temp. a limits - 40 c to 85 c unit min. b typ. c max. b analog switch analog signal range d v no , v nc v com full 0 v+ v on-resistance r on v+ = 4.5 v, v com = 0.7 v/2.5 v, i no , i nc = 10 ma room full 11.5 1.6 ? r on flatness d r on flatness v+ = 4.5 v, v com = 0 v to v+, i no , i nc = 10 ma room 0.7 r on match between channels ? r on room 0.3 switch off leakage current i no(off) i nc(off) v+ = 5.5 v v no , v nc = 1 v/4.5 v, v com = 4.5 v/1 v room full - 1 - 10 1 10 na i com(off) room full - 1 - 10 1 10 channel-on leakage current i com(on) v+ = 5.5 v, v no , v nc = v com = 1 v/4.5 v room full - 1 - 10 1 10 digital control input high voltage v inh full 2.4 v input low voltage v inl full 0.8 input capacitance c in full 4 pf input current i inl or i inh v in = 0 v or v+ full - 1 1 a
www.vishay.com 6 document number: 72091 s11-1185-rev. b, 13-jun-11 vishay siliconix dg2041, dg2042, dg2043 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes: a. room = 25 c, full = as determined by the operating suffix. b. the algebraic convention whereby the most negative value is a minimum and the most pos itive a maximum, is used in this data sheet. c. typical values are for design aid only, not guaranteed nor subject to production testing. d. guarantee by design, nor s ubjected to production test. e. v in = input voltage to perform proper function. f. guaranteed by 5 v leakage testing, not production tested. stresses beyond those listed under ?absolute maximum ratings? ma y cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other condit ions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. specifications (v+ = 5 v) parameter symbol test conditions otherwise unless specified v+ = 5 v, 10 % , v in = 0.8 v or 2.4 v e temp. a limits - 40 c to 85 c unit min. b typ. c max. b dynamic characteristics tu r n - o n t i m e d t on v no or v nc = 3 v, r l = 300 ? , c l = 35 pf fig. 1 and 2 room full 13 42 43 ns turn-off time d t off room full 19 32 33 break-before-make time delay t d v no or v nc = 3 v, r l = 300 ? , c l = 35 pf (dg2043 only) room 1 charge injection d q inj c l = 1 nf, v gen = 0 v, r gen = 0 ? , fig. 2 room 3 pc off-isolation d oirr r l = 50 ? , c l = 5 pf, f = 1 mhz room - 63 db crosstalk d x ta l k room - 93 source-off capacitance d c no(off) c nc(off) v in = 0 v or v+, f = 1 mhz room 26 pf channel-on capacitance d c on room 49 power supply power supply current i+ v in = 0 v or v+ 0.001 1 a
document number: 72091 s11-1185-rev. b, 13-jun-11 www.vishay.com 7 vishay siliconix dg2041, dg2042, dg2043 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c unless noted) r on vs. v com and supply voltage supply current vs. temperature leakage current vs. temperature 0 1 2 3 4 5 012345 v com - analog voltage (v) v+ = 2 v v+ = 3 v v+ = 5 v i s = 10 ma 5 r on - on-resistance ( ? ) - 60 - 40 - 20 0 20 40 60 80 100 1000 100 0.1 temperature ( c) i+ - supply current (na) 10 v in = 0 v 1 v+ = 5.0 v v+ = 3.0 v v+ = 2.0 v - 60 - 40 - 20 0 20 40 60 80 100 1000 1 100 leakage current (pa) temperature ( c) 10 000 v+ = 5 v 10 i no(off) /i nc(off) i com(on) i com(off) r on vs. analog voltage and temperature supply current vs. input switching frequency leakage vs. analog voltage 0 1 2 3 4 5 012345 - on-resistance ( ? ) r on v com - analog voltage (v) v+ = 2 v - 40 c v+ = 3 v 25 c 85 c 25 c 85 c v+ = 5 v i s = 10 ma - 40 c 85 c - 40 c 25 c 10 m input switching frequency (hz) 10 k 1 m 10 m 100 k 1 k 100 10 i+ - supply current (a) 1 n 1 m 100 10 1 10 n 100 n - 100 - 80 - 60 - 40 - 20 0 20 40 60 80 100 012345 v com , v no , v nc - analog voltage leakage current (pa) v+ = 5 v t = 25 c i no ( o f f ) /i nc( of f) i co m( on) i co m ( of f)
www.vishay.com 8 document number: 72091 s11-1185-rev. b, 13-jun-11 vishay siliconix dg2041, dg2042, dg2043 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c unless noted) switching time vs. temperature and supply voltage switching threshold vs. supply voltage 0 10 20 30 40 50 60 - 60 - 40 - 20 0 20 40 60 80 100 t on v+ = 2 v temperature ( c) t on , t off - switching time (ns) t on v+ = 3 v t on v+ = 5 v t off v+ = 2 v t off v+ = 5 v t off v+ = 3 v 0.0 0.5 1.0 1.5 2.0 2.5 3.0 01234567 v+ - supply voltage (v) v t - switching threshold (v) insertion loss, off-isolation crosstalk vs. frequency charge injection vs. analog voltage - 9 0 - 20 10 loss, oirr, x frequency (hz) - 10 0 10 m 1 g 100 m 1 m 100 k - 30 - 40 - 50 - 60 - 70 - 80 talk (db) v+ = 3 v r l = 50 ? loss oirr x talk - 60 - 40 - 20 0 20 0123456 v com - analog voltage (v) q - charge injection (pc) v+ = 3 v v+ = 5 v v+ = 2 v 6
document number: 72091 s11-1185-rev. b, 13-jun-11 www.vishay.com 9 vishay siliconix dg2041, dg2042, dg2043 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 test circuits vishay siliconix maintains worldwide manufacturing capability. pr oducts may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?72091 . figure 1. switching time switch input c l (includes fixture and stray capacitance) v+ in no or nc c l 35 pf com logic input r l 300 ? v out gnd v+ 50 % 0 v logic input switch output t on t off logic "1" = switch on logic input waveforms inverted for switches that have the opposite logic sense. switch output v out =v com r l r l +r on 0.9 x v out t r < 5 ns t f < 5 ns v inh v inl figure 2. charge injection off on on in ? v out v out q = ? v out x c l c l = 1 nf com r gen v out nc or no v in = 0 - v+ in v gen gnd v+ v+ in depends on switch configuration: input polarity determined by sense of switch. + figure 3. off-isolation in gnd nc or no 0 v, 2.4 v 10 nf com off isolation = 20 log v com v no/ nc r l analyzer v+ v+ figure 4. channel off/on capacitance nc or no f = 1 mhz in com gnd 0 v, 2.4 v meter hp4192a impedance analyzer or equivalent 10 nf v+ v+
terminal tip 5 index area (d 2 e 2) exposed pad 8 -b- d d/2 e/2 -a- e c aaa 2 x top view aa1 a3 -c- seating plane side view bb dd aa cc detail a c 0.08 nx 9 c ccc // d2 d2/2 detail b (ne-1) x e 6 n l e2/2 e2 detail a 2 1 n-1 n (nd-1) x e 8 bottom view c bbb m a b n b 5 datum a or b n r e terminal tip 5 even terminal/side odd terminal/side detail b e e/2 4 c aaa 2 x package information vishay siliconix document number: 71921 19-aug-02 www.vishay.com 1 qfn?16 (4 4 mm) jedec part number: mo-220
notes: 1. dimensioning and tolerancing conform to asme y14.5m-1994. 2. all dimensions are in millimeters. all angels are in degrees. 3. n is the total number of terminals. 4. the terminal #1 identifier and terminal numbering convention shall conform to jesd 95-1 spp-012. details of terminal #1 iden tifier are optional, but must be located within the zone indicated. the terminal #1 identifier may be either a molded or marked feature. the x and y dimens ion will vary according to lead counts. 5. dimension b applies to metallized terminal and is measured between 0.25 mm and 0.30 mm from the terminal tip. 6. nd and ne refer to the number of terminals on the d and e side respectively. 7. depopulation is possible in a symmetrical fashion. 8. variation hhd is shown for illustration only. 9. coplanarity applies to the exposed heat sink slug as well as the terminals. package information vishay siliconix www.vishay.com 2 document number: 71921 19-aug-02 qfn?16 (4 4 mm) jedec part number: mo-220 millimeters* inches dim min nom max min nom max notes a 0.80 0.90 1.00 0.0315 0.0354 0.0394 a1 0 0.02 0.05 0 0.0008 0.0020 a3 - 0.20 ref - - 0.0079 - aa - 0.345 - - 0.0136 - aaa - 0.25 - - 0.0098 - bb - 0.345 - - 0.0136 - b 0.23 0.30 0.38 0.0091 0.0118 0.0150 5 bbb - 0.10 - - 0.0039 - cc - 0.18 - - 0.0071 - ccc - 0.10 - - 0.0039 - d 4.00 bsc 0.1575 bsc d2 2.00 2.15 2.25 0.0787 0.0846 0.0886 dd - 0.18 - - 0.0071 - e 4.00 bsc 0.1575 bsc e2 2.00 2.15 2.25 0.0787 0.0846 0.0886 e 0.65 bsc 0.0256 bsc l 0.45 0.55 0.65 0.0177 0.0217 0.0256 n 16 16 3, 7 nd - 4 - - 4 - 6 ne - 4 - - 4 - 6 r b(min)/2 - - b(min)/2 - - * use millimeters as the primary measurement. ecn: s-21437?rev. a, 19-aug-02 dwg: 5890
vishay siliconix package information document number: 74417 23-oct-06 www.vishay.com 1 symbols dimensions in millimeters min nom max a - 1.10 1.20 a1 0.05 0.10 0.15 a2 - 1.00 1.05 b 0.22 0.28 0.38 c - 0.127 - d 4.90 5.00 5.10 e 6.10 6.40 6.70 e1 4.30 4.40 4.50 e-0.65- l 0.50 0.60 0.70 l1 0.90 1.00 1.10 y--0.10 1036 ecn: s-61920-rev. d, 23-oct-06 dwg: 5624 tssop: 16-lead
vishay siliconix an505 document number: 74976 19-apr-07 www.vishay.com 1 recommended minimum pads for qfn-16 (4 x 4 mm body) note: qfn-16 (4 x 4) has an exposed center pad that must not come into contact with any metalized structure on the pcb. this area is considered a keep out zone. inches millimeters c1 0.142 3.60 c2 0.142 3.60 e 0.026 0.65 x1 0.014 0.35 x2 0.089 2.25 y1 0.037 0.95 y2 0.089 2.25 1 2 3 4 12 11 10 9 16 15 14 1 3 5 6 7 8 keep o u t zone c1 x2 x1 e y1 c2 y2
document number: 91 000 www.vishay.com revision: 11-mar-11 1 disclaimer legal disclaimer notice vishay all product, product specifications and data ar e subject to change without notice to improve reliability, function or design or otherwise. vishay intertechnology, inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectivel y, vishay), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained in any datasheet or in any o ther disclosure relating to any product. vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. to the maximum extent permitted by applicab le law, vishay disc laims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, incl uding without limitation specia l, consequential or incidental dama ges, and (iii) any and all impl ied warranties, including warran ties of fitness for particular purpose, non-infringement and merchantability. statements regarding the suitability of pro ducts for certain types of applications are based on vishays knowledge of typical requirements that are often placed on vishay products in gene ric applications. such statements are not binding statements about the suitability of products for a partic ular application. it is the customers responsibility to validate that a particu lar product with the properties described in th e product specification is su itable for use in a particul ar application. parameters provided in datasheets an d/or specifications may vary in different applications and perfo rmance may vary over time. all operating parameters, including typical pa rameters, must be validated for each customer application by the customers technical experts. product specifications do not expand or otherwise modify vishays term s and conditions of purchase, including but not limited to the warranty expressed therein. except as expressly indicated in writing, vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the vishay product co uld result in person al injury or death. customers using or selling vishay products not expressly indicated for use in such applications do so at their own risk and agr ee to fully indemnify and hold vishay and it s distributors harmless from and against an y and all claims, liabilities, expenses and damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that vis hay or its distributor was negligent regarding the design or manufact ure of the part. please contact authorized vishay personnel t o obtain written terms and conditions regarding products designed fo r such applications. no license, express or implied, by estoppel or otherwise, to any intelle ctual property rights is gran ted by this document or by any conduct of vishay. product names and markings noted herein may be trademarks of their respective owners.

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